diff options
| author | Michael Niewöhner <foss@mniewoehner.de> | 2019-10-24 00:19:45 +0200 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2019-10-26 15:47:49 +0000 |
| commit | b17f3d3d3cdd215edcff492699c744a4c85908d0 (patch) | |
| tree | c01f9b096a9f54d767654578809d1652890b2228 /src/soc/intel/apollolake/Makefile.inc | |
| parent | 7ef19036fbfeaad63ccb4dde26b3133d6128d0b8 (diff) | |
soc,mb/intel: clean up remaining FSP2.0 socs/boards
Remove CONFIG_...FSP2.0 based if-switches from FSP2.0-only socs/boards
Change-Id: Iae92dc2e2328b14c78ac686aaf326bd68430933b
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36279
Reviewed-by: Michael Niewöhner
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 41faf7243b..5530e5c5ab 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -22,7 +22,7 @@ bootblock-y += uart.c romstage-y += car.c romstage-y += ../../../cpu/intel/car/romstage.c -romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c +romstage-y += romstage.c romstage-y += gspi.c romstage-y += heci.c romstage-y += i2c.c |