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authorFurquan Shaikh <furquan@google.com>2016-06-09 21:35:50 -0700
committerMartin Roth <martinroth@google.com>2016-06-12 12:30:15 +0200
commit6f762171de4b8514fddd430052cbf24524e09e5d (patch)
tree8434f773dcac2f7ea9ac130f177818a1e91f099f /src/soc/intel/apollolake/Makefile.inc
parent061e0fb9ace6e93d751a515720fff9d84a7332f7 (diff)
intel/apollolake: Use custom reset calls
Due to USB LDO issue in current steppings, cold reboot needs to be temporarily disabled. Thus, hard_reset call should be the same as soft_reset. Once future steppings are available INTEL_COMMON_RESET can be enabled again. Change-Id: If0ec56db3864d500acc93d2b363a78a6cd7632da Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15143 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
-rw-r--r--src/soc/intel/apollolake/Makefile.inc3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 9e4e160e35..a03ac49961 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -28,6 +28,7 @@ romstage-y += meminit.c
romstage-y += mmap_boot.c
romstage-y += tsc_freq.c
romstage-y += pmutil.c
+romstage-y += reset.c
smm-y += mmap_boot.c
smm-y += pmutil.c
@@ -52,6 +53,7 @@ ramstage-y += tsc_freq.c
ramstage-y += pmutil.c
ramstage-y += pmc.c
ramstage-y += smi.c
+ramstage-y += reset.c
postcar-y += exit_car.S
postcar-y += memmap.c
@@ -65,6 +67,7 @@ verstage-y += mmap_boot.c
verstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
verstage-y += tsc_freq.c
verstage-y += pmutil.c
+verstage-y += reset.c
CPPFLAGS_common += -I$(src)/soc/intel/apollolake/include