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authorFurquan Shaikh <furquan@chromium.org>2016-11-21 12:41:20 -0800
committerMartin Roth <martinroth@google.com>2016-12-07 20:23:01 +0100
commitd6c555971b9f9f0c2d49269b0874e3480258531a (patch)
treed6dfa1bcbf1f122cac1b3f62f6eb0a86901c45ac /src/soc/intel/apollolake/Makefile.inc
parentb5d41cb063a54d2a90e0480ede18d3b9c1ae8474 (diff)
soc/intel/apollolake: Use the new SPI driver interface
1. Define controller for fast SPI. 2. Separate out functions that are specific to SPI and flash controller in different files. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully for reef. Change-Id: If07db9d27bbf4f4eb6024175cb7753c6cf4fb793 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/17562 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
-rw-r--r--src/soc/intel/apollolake/Makefile.inc6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index 24b5035bed..d058ddbbba 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -12,6 +12,7 @@ bootblock-y += bootblock/bootblock.c
bootblock-y += bootblock/cache_as_ram.S
bootblock-y += bootblock/bootblock.c
bootblock-y += car.c
+bootblock-y += flash_ctrlr.c
bootblock-y += gpio.c
bootblock-y += heci.c
bootblock-y += itss.c
@@ -24,6 +25,7 @@ bootblock-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
romstage-y += car.c
romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c
+romstage-y += flash_ctrlr.c
romstage-y += gpio.c
romstage-y += heci.c
romstage-y += i2c_early.c
@@ -38,6 +40,7 @@ romstage-y += pmutil.c
romstage-y += reset.c
romstage-y += spi.c
+smm-y += flash_ctrlr.c
smm-y += mmap_boot.c
smm-y += pmutil.c
smm-y += gpio.c
@@ -50,6 +53,7 @@ ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
ramstage-y += cpu.c
ramstage-y += chip.c
ramstage-y += elog.c
+ramstage-y += flash_ctrlr.c
ramstage-y += dsp.c
ramstage-y += gpio.c
ramstage-y += graphics.c
@@ -76,6 +80,7 @@ ramstage-y += spi.c
ramstage-y += xhci.c
postcar-y += exit_car.S
+postcar-y += flash_ctrlr.c
postcar-y += memmap.c
postcar-y += mmap_boot.c
postcar-y += spi.c
@@ -83,6 +88,7 @@ postcar-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
postcar-y += tsc_freq.c
verstage-y += car.c
+verstage-y += flash_ctrlr.c
verstage-y += i2c_early.c
verstage-y += heci.c
verstage-y += memmap.c