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authorAndrey Petrov <andrey.petrov@intel.com>2016-02-25 17:42:25 -0800
committerMartin Roth <martinroth@google.com>2016-03-08 13:51:23 +0100
commitb4831460a5e61e5069021c20d7baf29fde485570 (patch)
tree1faa847f990cc2d80a6125c092e6f833964f6242 /src/soc/intel/apollolake/Makefile.inc
parent5672dcd58c0ae7f7a0d14af0a88ff9c534e0936a (diff)
soc/intel/apollolake: Add romstage that calls FSP2.0 driver
This romstage is minimalistic. Its goal is to set up some BARs that FSP expects to be set and then invoke FSP driver to train memory. Change-Id: I3fa56aafe99cf6cf062a46dece3a0febeafdbfad Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/13805 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
-rw-r--r--src/soc/intel/apollolake/Makefile.inc1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index e27fd27128..81ca688d67 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -17,6 +17,7 @@ bootblock-y += tsc_freq.c
bootblock-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
romstage-y += placeholders.c
+romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c
romstage-y += gpio.c
romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
romstage-y += mmap_boot.c