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authorAngel Pons <th3fanbus@gmail.com>2020-09-07 13:18:10 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-09-09 10:34:32 +0000
commitb36100faf49c5a01e062e93b9a2fe542709fb6bd (patch)
treead70742077d0185b38d72ce2ff264a3c7f81ecea /src/soc/intel/apollolake/Makefile.inc
parentee735945754180544c8bd060d6fc0b9b2c507360 (diff)
soc/intel/apollolake: Rename `SOC_INTEL_GLK` symbol
For consistency with other platforms, use `SOC_INTEL_GEMINILAKE`. Change-Id: I06310e5a9bca6c9504f19a6c2fe9b26626f290d4 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/45141 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
-rw-r--r--src/soc/intel/apollolake/Makefile.inc8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index a20a554be1..79fab1a9d1 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -30,7 +30,7 @@ romstage-y += heci.c
romstage-y += i2c.c
romstage-y += uart.c
romstage-y += meminit.c
-ifeq ($(CONFIG_SOC_INTEL_GLK),y)
+ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y)
romstage-y += meminit_util_glk.c
else
romstage-y += meminit_util_apl.c
@@ -90,7 +90,7 @@ verstage-y += pmutil.c
verstage-y += reset.c
verstage-y += spi.c
-ifeq ($(CONFIG_SOC_INTEL_GLK),y)
+ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y)
bootblock-y += gpio_glk.c
romstage-y += gpio_glk.c
smm-y += gpio_glk.c
@@ -149,7 +149,7 @@ files_added:: $(IFWITOOL)
endif
# DSP firmware settings files.
-ifeq ($(CONFIG_SOC_INTEL_GLK),y)
+ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y)
NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/glk/nhlt-blobs
else
NHLT_BLOB_PATH = 3rdparty/blobs/soc/intel/apollolake/nhlt-blobs
@@ -185,7 +185,7 @@ cbfs-files-$(CONFIG_NHLT_RT5682) += $(RT5682_RENDER_CAPTURE)
$(RT5682_RENDER_CAPTURE)-file := $(NHLT_BLOB_PATH)/$(RT5682_RENDER_CAPTURE)
$(RT5682_RENDER_CAPTURE)-type := raw
-ifeq ($(CONFIG_SOC_INTEL_GLK),y)
+ifeq ($(CONFIG_SOC_INTEL_GEMINILAKE),y)
# Gemini Lake B0 (706a1) only atm.
cpu_microcode_bins += $(wildcard 3rdparty/intel-microcode/intel-ucode/06-7a-*)
else