diff options
| author | Bora Guvendik <bora.guvendik@intel.com> | 2017-04-10 15:49:02 -0700 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-04-28 16:30:57 +0200 |
| commit | 33117ec6012fa78765209593e9ab1f4a07812d83 (patch) | |
| tree | b07c88d0b054ab29243379b801fae96c67267142 /src/soc/intel/apollolake/Makefile.inc | |
| parent | fcab4156c8fea9b48a251325a48ba3872b5abb14 (diff) | |
soc/intel/apollolake: Use ITSS common code
This patch uses common ITSS library to setup
itss irq.
Change-Id: Id265505cfc106668aea25ad93e114fe20736b700
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Reviewed-on: https://review.coreboot.org/19236
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 1e6aafdbcd..1d5bac8ddb 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -14,7 +14,6 @@ bootblock-y += car.c bootblock-y += flash_ctrlr.c bootblock-y += gpio.c bootblock-y += heci.c -bootblock-y += itss.c bootblock-y += lpc_lib.c bootblock-y += mmap_boot.c bootblock-y += pmutil.c @@ -29,7 +28,6 @@ romstage-y += flash_ctrlr.c romstage-y += gpio.c romstage-y += heci.c romstage-y += i2c_early.c -romstage-y += itss.c romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c romstage-y += lpc_lib.c romstage-y += memmap.c @@ -60,7 +58,6 @@ ramstage-y += gpio.c ramstage-y += graphics.c ramstage-y += heci.c ramstage-y += i2c.c -ramstage-y += itss.c ramstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c ramstage-y += lpc.c ramstage-y += lpc_lib.c |