soc/apollolake/lpc: Open I/O to LPC based on resource allocation

Besides a number of fixed memory windows, Apollolake supports
opening a configureable 64 KiB MMIO window, as well as four PMIO
windows to the LPC bus. Open up these windows dynamically, based on
how resources were allocated to the child LPC devices.

Change-Id: I170e861693cb6fd1be38889adc951f197a13460f
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc@intel.com>
Reviewed-on: https://review.coreboot.org/14584
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>

1 files changed, 3 insertions, 0 deletions

diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc
index e162a01a13..6b934a891a 100644
--- a/src/soc/intel/apollolake/Makefile.inc
+++ b/src/soc/intel/apollolake/Makefile.inc
@@ -13,6 +13,7 @@ bootblock-y += bootblock/cache_as_ram.S
 bootblock-y += bootblock/bootblock.c
 bootblock-y += car.c
 bootblock-y += gpio.c
+bootblock-y += lpc_lib.c
 bootblock-y += mmap_boot.c
 bootblock-y += placeholders.c
 bootblock-y += tsc_freq.c
@@ -23,6 +24,7 @@ romstage-y += car.c
 romstage-$(CONFIG_PLATFORM_USES_FSP2_0) += romstage.c
 romstage-y += gpio.c
 romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
+romstage-y += lpc_lib.c
 romstage-y += memmap.c
 romstage-y += mmap_boot.c
 romstage-y += tsc_freq.c
@@ -38,6 +40,7 @@ ramstage-y += placeholders.c
 ramstage-y += gpio.c
 ramstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c
 ramstage-y += lpc.c
+ramstage-y += lpc_lib.c
 ramstage-y += memmap.c
 ramstage-y += mmap_boot.c
 ramstage-y += uart.c