diff options
| author | Ravi Sarawadi <ravishankar.sarawadi@intel.com> | 2017-07-20 15:11:19 -0700 |
|---|---|---|
| committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-26 17:52:32 +0000 |
| commit | 09195ac0f934989c83cb1d08d132ce6d3817151c (patch) | |
| tree | e86da636d8c4e98a0e93bad474cb5b81238b625f /src/soc/intel/apollolake/Makefile.inc | |
| parent | ab94ba309e13b14334ed4dcf443d11e0e5baeb61 (diff) | |
soc/intel/apollolake: Update memory HOB info save function
SMBIOS memory HOB produced by glk FSP v52_27 has new structure
members, which are not available in current apl FSP. New FSP-m
header file in https://review.coreboot.org/#/c/20673/ lists new
SMBIOS structure members.
Break memory HOB save routine into different functions for glk
and apl to accomodate new changes.
Change-Id: I33c6e4f2842cebbb326b6a05436fa69e3836ffc6
Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi@intel.com>
Reviewed-on: https://review.coreboot.org/20674
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/apollolake/Makefile.inc | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index af4efc191b..07bbdcdc65 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -27,6 +27,11 @@ romstage-$(CONFIG_SOC_UART_DEBUG) += uart_early.c romstage-y += lpc_lib.c romstage-y += memmap.c romstage-y += meminit.c +ifeq ($(CONFIG_SOC_INTEL_GLK),y) +romstage-y += meminit_util_glk.c +else +romstage-y += meminit_util_apl.c +endif romstage-y += mmap_boot.c romstage-y += pmutil.c romstage-y += reset.c |