diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2021-01-09 22:53:52 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-02-09 07:53:23 +0000 |
| commit | cc93c6e47480de06ce87705a93bc46d806cabbb3 (patch) | |
| tree | 4fa56de3a3e885246d3892c6897d954bf2e3ffb3 /src/soc/intel/alderlake | |
| parent | 4949a3dd626560aa504cee18d936d0d7602becfa (diff) | |
soc/amd,intel: Drop s3_resume parameter on FSP-S functions
ACPI S3 is a global state and it is no longer needed to
pass it as a parameter.
Change-Id: Id0639a47ea65c210b9a79e6ca89cee819e7769b1
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50360
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/chip.c | 3 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/cpu.c | 3 |
2 files changed, 2 insertions, 4 deletions
diff --git a/src/soc/intel/alderlake/chip.c b/src/soc/intel/alderlake/chip.c index c7e3fb8c2f..95ad8657ab 100644 --- a/src/soc/intel/alderlake/chip.c +++ b/src/soc/intel/alderlake/chip.c @@ -10,7 +10,6 @@ #include <intelblocks/itss.h> #include <intelblocks/pcie_rp.h> #include <intelblocks/xdci.h> -#include <romstage_handoff.h> #include <soc/intel/common/vbt.h> #include <soc/itss.h> #include <soc/pci_devs.h> @@ -134,7 +133,7 @@ void soc_init_pre_device(void *chip_info) itss_snapshot_irq_polarities(GPIO_IRQ_START, GPIO_IRQ_END); /* Perform silicon specific init. */ - fsp_silicon_init(romstage_handoff_is_resume()); + fsp_silicon_init(); /* Display FIRMWARE_VERSION_INFO_HOB */ fsp_display_fvi_version_hob(); diff --git a/src/soc/intel/alderlake/cpu.c b/src/soc/intel/alderlake/cpu.c index 9fab277781..32f5ea23a4 100644 --- a/src/soc/intel/alderlake/cpu.c +++ b/src/soc/intel/alderlake/cpu.c @@ -19,7 +19,6 @@ #include <intelblocks/cpulib.h> #include <intelblocks/mp_init.h> #include <intelblocks/msr.h> -#include <romstage_handoff.h> #include <soc/cpu.h> #include <soc/msr.h> #include <soc/pci_devs.h> @@ -27,7 +26,7 @@ static void soc_fsp_load(void) { - fsps_load(romstage_handoff_is_resume()); + fsps_load(); } static void configure_misc(void) |