diff options
| author | Subrata Banik <subratabanik@google.com> | 2022-12-19 23:14:35 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-12-23 13:00:30 +0000 |
| commit | e9ac9f97e84ea4ceec3f2468f3ca2b5f2c47fbf2 (patch) | |
| tree | 64d8ebee4fb17259bb61c7f2411a3e03aba85c49 /src/soc/intel/alderlake | |
| parent | af20628a48d8a741a744dc0ecbfbc49524713eaf (diff) | |
soc/intel: Drop SoC specific DPTF implementation
This patch drops the SoC specific implementation as DPTF driver can
now fillin those platform specific data using SoC specific macros.
Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: If65976f15374ba2410b537b1646ce466ba02969b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/71112
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel/alderlake')
| -rw-r--r-- | src/soc/intel/alderlake/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/intel/alderlake/dptf.c | 35 |
2 files changed, 0 insertions, 36 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index 7f808ffa6e..415c2b1a56 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -27,7 +27,6 @@ romstage-y += cpu.c ramstage-y += acpi.c ramstage-y += chip.c ramstage-y += cpu.c -ramstage-y += dptf.c ramstage-y += elog.c ramstage-y += espi.c ramstage-y += finalize.c diff --git a/src/soc/intel/alderlake/dptf.c b/src/soc/intel/alderlake/dptf.c deleted file mode 100644 index 00f2e5ca80..0000000000 --- a/src/soc/intel/alderlake/dptf.c +++ /dev/null @@ -1,35 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <drivers/intel/dptf/dptf.h> -#include <soc/dptf.h> - -static const struct dptf_platform_info adl_dptf_platform_info = { - .use_eisa_hids = CONFIG(DPTF_USE_EISA_HID), - /* _HID for the toplevel DPTF device, typically \_SB.DPTF */ - .dptf_device_hid = DPTF_DPTF_DEVICE, - /* _HID for Intel DPTF Generic Device (these require PTYP as well) */ - .generic_hid = DPTF_GEN_DEVICE, - /* _HID for Intel DPTF Fan Device */ - .fan_hid = DPTF_FAN_DEVICE, - /* _HID for the toplevel TPCH device, typically \_SB.TPCH */ - .tpch_device_hid = DPTF_TPCH_DEVICE, - /* _HID for the toplevel TPWR device, typically \_SB.DPTF.TPWR */ - .tpwr_device_hid = DPTF_TPWR_DEVICE, - /* _HID for the toplevel BAT1 device, typically \_SB.DPTF.BAT1 */ - .tbat_device_hid = DPTF_BAT1_DEVICE, - - .tpch_method_names = { - .set_fivr_low_clock_method = "RFC0", - .set_fivr_high_clock_method = "RFC1", - .get_fivr_low_clock_method = "GFC0", - .get_fivr_high_clock_method = "GFC1", - .get_fivr_ssc_method = "GEMI", - .get_fivr_switching_fault_status = "GFFS", - .get_fivr_switching_freq_mhz = "GFCS", - }, -}; - -const struct dptf_platform_info *soc_get_dptf_platform_info(void) -{ - return &adl_dptf_platform_info; -} |