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author | Maulik V Vaghela <maulik.v.vaghela@intel.com> | 2021-07-02 14:42:03 +0530 |
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committer | Patrick Georgi <pgeorgi@google.com> | 2021-07-14 08:19:32 +0000 |
commit | b3d24d33606f01fcdda54ba50dc9bbb51e02bac7 (patch) | |
tree | 0573bee08f46460e9ec4d045ddb421791d1776c3 /src/soc/intel/alderlake | |
parent | 1b12d785da70578b4954c58b9a38285fcd5d778c (diff) |
soc/intel/alderlake: Add GFx Device ID 0x46a6
This CL adds support for new ADL graphics Device ID 0x46a6.
TEST=Build and boot Adlrvp board
Change-Id: I8ca875c7faf2997d207aff9e292f94a3b6311e94
Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56026
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake')
-rw-r--r-- | src/soc/intel/alderlake/bootblock/report_platform.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 5ddc3228a0..d8111238e8 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -105,6 +105,7 @@ static struct { { PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, }; |