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author | Felix Held <felix-coreboot@felixheld.de> | 2021-02-14 22:45:48 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-02-16 00:08:06 +0000 |
commit | 4ef37ae68d14e91eca5ca08fe4b7b9df970e1fbe (patch) | |
tree | bad79eda2964ec93375ef41fd3ca15e39fa07192 /src/soc/intel/alderlake | |
parent | 15f84cc33bd6a7180a2252ac9fae914d2118dbec (diff) |
soc/amd/cezanne/data_fabric: add ACPI names and SSDT entries
Additionally to the PCI IDs of Cezanne it also handles the Renoir ones.
The main difference between those two is that Renoir has two core
complexes while Cezanne only has one core complex. I haven't seen
incompatible changes between those two though, so for example the fabric
IDs are the same and the one that's only present in Renoir is just not
used in Cezanne. Also adding the ACPI parts for those don't have
anything to do with those differences.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I3b2517bc15d872f41183a33857333f1972ff2cb9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/50706
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/intel/alderlake')
0 files changed, 0 insertions, 0 deletions