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authorPatrick Rudolph <patrick.rudolph@9elements.com>2023-01-30 13:44:50 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-07-18 15:06:05 +0000
commitc39eb2002725e55aaf1105bbc315631940073b40 (patch)
tree85678d60cb16ac688d6477903ebf088827bc8890 /src/soc/intel/alderlake/xhci.c
parentb1ef846da899c58c75f8ec1a98dd052dc4934dbf (diff)
memory_info: Bump to 64 DIMMs
Intel SPR supports up to 64 DIMMs on a 4 socket board. Bump DIMM_INFO struct to 64 slots to properly present all of them to the OS. Change-Id: I52d77c4e9bff96adba6d265a272e0e425dbdb791 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/73367 Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Naresh <naresh.solanki.2011@gmail.com>
Diffstat (limited to 'src/soc/intel/alderlake/xhci.c')
0 files changed, 0 insertions, 0 deletions