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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-04-29 07:42:45 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-05-01 17:33:31 +0000 |
commit | 167ccc7e65b251c3b735f82ce0675a6f85e157a8 (patch) | |
tree | 718a9d19324029c5c424f5b4d71390d4963303fd /src/soc/intel/alderlake/spi.c | |
parent | 96581b3217203b0618062799b9a117bd7cc684ff (diff) |
mainboard/*: Drop USB power control bits in GNVS
There is no platform-level implementation for USB port power management
in various sleepstates. The mainboards changed here never evaluate the
set GNVS variables S3U0, S3U1, S5U0 and S5U1 in ASL or in their SMI
handlers.
Change-Id: Ia1bc5969804a7346caac4ae93336efd9f0240c87
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74858
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Frans Hendriks <fhendriks@eltan.com>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-by: Erik van den Bogaert <ebogaert@eltan.com>
Diffstat (limited to 'src/soc/intel/alderlake/spi.c')
0 files changed, 0 insertions, 0 deletions