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| author | Subrata Banik <subratabanik@google.com> | 2023-02-17 02:22:31 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2023-02-17 08:30:15 +0000 |
| commit | 8b223d43ce5e00b08fe19bdb044344b4e98e7a22 (patch) | |
| tree | 30b0eb34acf805acf2da87e0af4cfc68ee9dbde4 /src/soc/intel/alderlake/spi.c | |
| parent | eac71c0bcf49477c56c252d4c3ead0d6006e1ecf (diff) | |
soc/intel/cmn/acpi/pep: Add PCI device number for warning msg
This patch fixes the wrong warning msg around `Unknown min d_state`
with having proper PCI Bus/Device/Function number to help to parse
the log better.
With this patch:
[WARN ] Unknown min d_state for 20
[WARN ] Unknown min d_state for 50
[WARN ] Unknown min d_state for 98
[WARN ] Unknown min d_state for 9a
[WARN ] Unknown min d_state for f9
With this patch:
[WARN ] Unknown min d_state for PCI: 00:04.0
[WARN ] Unknown min d_state for PCI: 00:0a.0
[WARN ] Unknown min d_state for PCI: 00:13.0
[WARN ] Unknown min d_state for PCI: 00:13.2
[WARN ] Unknown min d_state for PCI: 00:1f.1
Change-Id: Iccaf26882ce5998469b2be6cf5bc7082f193cb29
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73071
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel/alderlake/spi.c')
0 files changed, 0 insertions, 0 deletions