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authorMichael Niewöhner <foss@mniewoehner.de>2021-09-27 18:39:41 +0200
committerMichael Niewöhner <foss@mniewoehner.de>2021-10-17 13:57:30 +0000
commit01b3c40bfef5f5789a8521da766be8792eeb06c2 (patch)
treecc2ed65d163a382945dda45b091bab0d3e68f799 /src/soc/intel/alderlake/pmc.c
parent820b9c4676ba56da56ed04164335c5dba9d3dcbe (diff)
soc/intel: move disabling of PM Timer to SoC PMC code
Move disabling of PM Timer to SoC PMC code. The original reason for placing that in `finalize` [1] was FSP hanging due to use of the PM timer without enabling timer emulation first in coreboot, which was added later [2]. [1] commit 6c1bf27dae (intel/skylake: disable ACPI PM Timer to enable XTAL OSC shutdown) [2] commit f004f66ca7 (soc/intel/skylake: Enable ACPI PM timer emulation on all CPUs) Change-Id: I354c3aea0c8c1f8ff3d698e0636932b7b76125f7 Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58019 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/alderlake/pmc.c')
-rw-r--r--src/soc/intel/alderlake/pmc.c9
1 files changed, 9 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/pmc.c b/src/soc/intel/alderlake/pmc.c
index 6f9b03b16f..4251cd66bd 100644
--- a/src/soc/intel/alderlake/pmc.c
+++ b/src/soc/intel/alderlake/pmc.c
@@ -152,6 +152,15 @@ static void soc_pmc_init(struct device *dev)
* done from the "ops->init" callback.
*/
pmc_set_acpi_mode();
+
+ /*
+ * Disable ACPI PM timer based on Kconfig
+ *
+ * Disabling ACPI PM timer is necessary for XTAL OSC shutdown.
+ * Disabling ACPI PM timer also switches off TCO
+ */
+ if (!CONFIG(USE_PM_ACPI_TIMER))
+ pmc_disable_acpi_timer();
}
static void pm1_enable_pwrbtn_smi(void *unused)