summaryrefslogtreecommitdiff
path: root/src/soc/intel/alderlake/meminit.c
diff options
context:
space:
mode:
authorTim Wawrzynczak <twawrzynczak@chromium.org>2021-07-09 10:23:10 -0600
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-07-13 14:29:33 +0000
commit82225b81f8e4e07268e229e51863ecc706eb9b98 (patch)
tree9999fcf778d9662b57c791755e465723a3b40099 /src/soc/intel/alderlake/meminit.c
parent989c7c4f8b03ad928483b244337784f6d7463f3f (diff)
soc/intel/alderlake: Add (and fix) devices in IRQ table
Some devices were missing from the IRQ table, and this lack of IRQ programming for the devices (although unused), was causing S0ix entry to fail. BUG=b:176858827 TEST=suspend_stress_test -c10 passes, EC observes SLP_S0IX# toggle correctly upon entry/exit from S0ix Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ia7612ee008842ba2b8dcd36deb201f4f26130660 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56175 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
Diffstat (limited to 'src/soc/intel/alderlake/meminit.c')
0 files changed, 0 insertions, 0 deletions