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authorJohn Zhao <john.zhao@intel.com>2021-05-24 19:30:37 -0700
committerTim Wawrzynczak <twawrzynczak@chromium.org>2021-05-26 15:43:14 +0000
commit81547a7d051a3d571d831725aa66b8060610ce33 (patch)
tree882bf74d0af205effabfa5c6191cbf44a0753c7d /src/soc/intel/alderlake/include
parentd8bb05ade0719c31668bb153e3aea2017688a36a (diff)
soc/intel/alderlake: Add validity for TBT firmware authentication
After Thunderbolt firmware is downloaded to IMR, its authentication validity needs to be checked. This change adds the TBT firmware IMR status register offset and its authentication valid bit for valid_tbt_auth function usage. BUG=b:188695995 TEST=Built coreboot image successfully. Signed-off-by: John Zhao <john.zhao@intel.com> Change-Id: I742a00b6b58c45c1261f06b06a94346ad0a74829 Reviewed-on: https://review.coreboot.org/c/coreboot/+/54888 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/include')
-rw-r--r--src/soc/intel/alderlake/include/soc/tcss.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/tcss.h b/src/soc/intel/alderlake/include/soc/tcss.h
index 713528bdbb..014e3076e6 100644
--- a/src/soc/intel/alderlake/include/soc/tcss.h
+++ b/src/soc/intel/alderlake/include/soc/tcss.h
@@ -3,6 +3,10 @@
#ifndef _SOC_TCSS_H_
#define _SOC_TCSS_H_
+/* Thunderbolt firmware IMR status */
+#define IOM_CSME_IMR_TBT_STATUS 0x14
+#define TBT_VALID_AUTHENTICATION (1 << 30)
+
/* IOM aux bias control registers in REGBAR MMIO space */
#define IOM_AUX_BIAS_CTRL_PULLUP_OFFSET_0 0x1070
#define IOM_AUX_BIAS_CTRL_PULLUP_OFFSET(x) (IOM_AUX_BIAS_CTRL_PULLUP_OFFSET_0 + (x) * 4)