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author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-19 15:35:47 -0600 |
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committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-10 19:38:46 +0000 |
commit | e2b8f30beeb1b63e1b94dccc1a96bed5c9a2c63e (patch) | |
tree | a95616939edb85010ad7dc2d679daa6518d61b15 /src/soc/intel/alderlake/include | |
parent | 6cf79d9d14aa6be9bc5594dcf4040da8cbb87544 (diff) |
soc/intel/alderlake: Set LpmStateEnableMask UPD
Use the get_supported_lpm_states() function to set the respective FSP
UPD.
TEST=with patchtrain on brya0,
/sys/kernel/debug/pmc_core/substate_requirements shows only the
substates that are applicable to the design (S0i2.0, S0i3.0).
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I5bb8b3671e78c5f2706db2d3a21b25cf90a14275
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56458
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/alderlake/include')
-rw-r--r-- | src/soc/intel/alderlake/include/soc/cpu.h | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/cpu.h b/src/soc/intel/alderlake/include/soc/cpu.h index b25979d261..233e0c2bd2 100644 --- a/src/soc/intel/alderlake/include/soc/cpu.h +++ b/src/soc/intel/alderlake/include/soc/cpu.h @@ -28,4 +28,7 @@ enum adl_cpu_type { enum adl_cpu_type get_adl_cpu_type(void); +/* Get a bitmask of supported LPM states */ +uint8_t get_supported_lpm_mask(void); + #endif |