diff options
| author | Deepti Deshatty <deepti.deshatty@intel.com> | 2021-05-12 16:09:07 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2021-05-14 08:57:57 +0000 |
| commit | 8386e7cd5bf763c281c0b25e6de127c289766de5 (patch) | |
| tree | 093bce18f5919e066d34c65ef7c6412861b1a3d3 /src/soc/intel/alderlake/include | |
| parent | f35be77ee36b7c591e28c905cd83acb6593f954a (diff) | |
soc/intel/alderlake: Add known CPU Port IDs for GPIO communities
Change-Id: Id5fa5b10edeb3445a2d2453d9122376041577598
Signed-off-by: Deepti Deshatty <deepti.deshatty@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/54087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/alderlake/include')
| -rw-r--r-- | src/soc/intel/alderlake/include/soc/pcr_ids.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/include/soc/pcr_ids.h b/src/soc/intel/alderlake/include/soc/pcr_ids.h index e4a29c4525..9ea075a78e 100644 --- a/src/soc/intel/alderlake/include/soc/pcr_ids.h +++ b/src/soc/intel/alderlake/include/soc/pcr_ids.h @@ -33,6 +33,12 @@ #define PID_ITSS 0xc4 #define PID_SERIALIO 0xcb +/* CPU Port IDs */ +#define PID_CPU_GPIOCOM0 0xb7 +#define PID_CPU_GPIOCOM1 0xb8 +#define PID_CPU_GPIOCOM3 0xbb +#define PID_CPU_GPIOCOM4 0xb9 +#define PID_CPU_GPIOCOM5 0xba /* * SPI - DMI Destination ID |