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authorMichał Żygowski <michal.zygowski@3mdeb.com>2022-11-23 14:43:17 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-04-11 16:34:48 +0000
commit16c762607794b618ed89eeeab025e1f9e3b2a848 (patch)
tree0ad1dcfda26f8f9d5be06fb834c699c22d7d2b4c /src/soc/intel/alderlake/gpio.c
parentffc4b8fda445f32488363564253642a469605b3d (diff)
soc/intel/alderlake: Hook up P2SB PCI ops
P2SB device is being hidden from coreboot by FSP-S. This breaks the resource allocator which does not report P2SB BAR via intel common block P2SB driver. Hook up the common block P2SB driver ops to soc_enable function so that the resources will be reported. The P2SB device must be set as hidden in the devicetree. This fixes the silent resource allocation conflicts on machines with devices having big BARs which accidentally overlapped P2SB BAR. TEST=Boot MSI PRO Z690-A with multiple PCIe devices/dGPUs with big BARs and see resource conflicts no longer occur. Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: I7c59441268676a8aab075abbc036e651b9426057 Reviewed-on: https://review.coreboot.org/c/coreboot/+/69949 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/alderlake/gpio.c')
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