diff options
| author | Jian Tong <tongjian@huaqin.corp-partner.google.com> | 2024-09-02 20:33:00 +0800 |
|---|---|---|
| committer | Karthik Ramasubramanian <kramasub@google.com> | 2024-09-11 16:12:32 +0000 |
| commit | b4aeb575910fd127c1ef34ef456d80f176528d8f (patch) | |
| tree | d3132e7792d7e2a6102c0d2d38815847dc8272d4 /src/soc/intel/alderlake/chipset.cb | |
| parent | 5e8b7963538bf125e5b743e7a9a1e995ef6298c6 (diff) | |
mb/google/brox/var/lotso: Update verb table
Correct the number of NID entries.
BUG=b:349996984
TEST=emerge-brox sys-boot/coreboot sys-boot/chromeos-bootimage
Change-Id: I5f5553a5d8014f957d6b89ac4c1039594817bf32
Signed-off-by: Jian Tong <tongjian@huaqin.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84184
Reviewed-by: Kun Liu <liukun11@huaqin.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/intel/alderlake/chipset.cb')
0 files changed, 0 insertions, 0 deletions