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authorVarshit B Pandya <varshit.b.pandya@intel.com>2021-07-14 11:08:23 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-07-20 13:35:10 +0000
commit339f0e7e14c00d7e322fbfc3d0b69af9285bc963 (patch)
treefa6311c3b38626dbb3ddd3c255c54419ee9702c7 /src/soc/intel/alderlake/chipset.cb
parentaefcab7ff60087d13b6300393faaad24b0403893 (diff)
soc/intel/alderlake: Add support for I2C6 and I2C7
As per the EDS revision 1.3 add support for I2C6 and I2C7. Signed-off-by: Varshit B Pandya <varshit.b.pandya@intel.com> Change-Id: Id918d55e48b91993af9de8381995917aef55edc9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55996 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/chipset.cb')
-rw-r--r--src/soc/intel/alderlake/chipset.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/chipset.cb b/src/soc/intel/alderlake/chipset.cb
index b05a1e9bb5..532ec38395 100644
--- a/src/soc/intel/alderlake/chipset.cb
+++ b/src/soc/intel/alderlake/chipset.cb
@@ -79,6 +79,8 @@ chip soc/intel/alderlake
device pci 0d.2 alias tcss_dma0 off end
device pci 0d.3 alias tcss_dma1 off end
device pci 0e.0 alias vmd off end
+ device pci 10.0 alias i2c6 off end
+ device pci 10.1 alias i2c7 off end
device pci 10.6 alias thc0 off end
device pci 10.7 alias thc1 off end
device pci 12.0 alias ish off end