soc/intel/alderlake: Configure the SKU specific parameters for VR domains

This patch configures the SKU specific power delivery parameters for the
VR domains.
+--------------+-------+-------+-------+-------+-----------+--------+
|      SKU     |Setting| AC LL | DC LL |ICC MAX|TDC Current|TDC Time|
|              |       |(mOhms)|(mOhms)|  (A)  |     (A)   |  (msec)|
+--------------+-------+-------+-------+-------+-----------+--------+
|ADL-P 682(45W)|   IA  |  2.3  |  2.3  |  160  |     57    | 28000  |
+              +-------+-------+-------+-------+-----------+--------+
|              |   GT  |  3.2  |  3.2  |   50  |     57    | 28000  |
+--------------+-------+-------+-------+-------+-----------+--------+
|ADL-P 482(28W)|   IA  |  2.3  |  2.3  |  109  |     40    | 28000  |
+              +-------+-------+-------+-------+-----------+--------+
|              |   GT  |  3.2  |  3.2  |   50  |     40    | 28000  |
+--------------+-------+-------+-------+-------+-----------+--------+
|ADL-P 282(15W)|   IA  |  2.8  |  2.8  |   80  |     20    | 28000  |
+              +-------+-------+-------+-------+-----------+--------+
|              |   GT  |  3.2  |  3.2  |   40  |     20    | 28000  |
+--------------+-------+-------+-------+-------+-----------+--------+

These config values are generated iPDG application with ADL-P platform
package tool and supports 15W/28W/45W SKU's.
RDC Kit ID for the iPDG tools,
* Intel(R) Platform Design Studio Installer: 610905.
* Intel(R) Platform Design Studio - Platform ADL-P (Partial): 627345.
* Intel(R) Platform Design Studio - Platform ADL-P (Full): 630261.

BUG=b:195033556

Signed-off-by: V Sowmya <v.sowmya@intel.com>
Change-Id: I434fd30b5bce3bfab5a5800a30317aaa04d9926a
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56325
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 6 insertions, 0 deletions

diff --git a/src/soc/intel/alderlake/chip.h b/src/soc/intel/alderlake/chip.h
index 077a58df79..248eedfd98 100644
--- a/src/soc/intel/alderlake/chip.h
+++ b/src/soc/intel/alderlake/chip.h
@@ -15,6 +15,7 @@
 #include <soc/pmc.h>
 #include <soc/serialio.h>
 #include <soc/usb.h>
+#include <soc/vr_config.h>
 #include <stdint.h>
 
 /* Types of different SKUs */
@@ -391,6 +392,11 @@ struct soc_intel_alderlake_config {
 		/* External Icc Max for VnnSx rail in mA  */
 		int vnn_icc_max_ma;
 	} ext_fivr_settings;
+
+	/* VrConfig Settings.
+	* 0 = VR_DOMAIN_IA Core 1 = VR_DOMAIN_GT.
+	*/
+	struct vr_config domain_vr_config[NUM_VR_DOMAINS];
 };
 
 typedef struct soc_intel_alderlake_config config_t;