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authorKane Chen <kane.chen@intel.com>2022-01-28 13:58:21 +0800
committerSubrata Banik <subratabanik@google.com>2022-01-31 04:39:13 +0000
commit3f8bff7764a564b839b139aabca6086f40d1a7af (patch)
treedc1db9d23a10777b527d3d2987c97102473c4610 /src/soc/intel/alderlake/bootblock
parent38c731413703bee1a773dccd7253ca186a4c5997 (diff)
soc/intel/alderlake: Add Alder Lake P IGD device IDs
This patch adds additional IGD device IDs as per document 638514. BUG=b:216420554 TEST=coreboot is able to probe the IGD device during PCI enumeration. Change-Id: I0cafe92581c454da5e4aeafd7ad52f0e65370b11 Signed-off-by: Kane Chen <kane.chen@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/61441 Reviewed-by: Subrata Banik <subratabanik@google.com> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/bootblock')
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 5c695f29a3..b419dda830 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -115,6 +115,9 @@ static struct {
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_4, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_7, "Alderlake P GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_8, "Alderlake P GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_P_GT2_9, "Alderlake P GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT3, "Alderlake M GT3" },