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| author | Bora Guvendik <bora.guvendik@intel.com> | 2021-07-23 14:12:57 -0700 |
|---|---|---|
| committer | Paul Fagerburg <pfagerburg@chromium.org> | 2021-08-05 15:55:20 +0000 |
| commit | 3198848dfa8ace97500d28a81124ba129aee84ca (patch) | |
| tree | 47e6cfeb2b9ce0f797f71001ffa23b06a4da9175 /src/soc/intel/alderlake/bootblock | |
| parent | 9b73c2b2f485c002626ee404372475cdd8e2543a (diff) | |
soc/intel/alderlake: Add GFx Device ID 0x46aa
This CL adds support for new ADL-M graphics Device ID 0x46aa.
TEST=boot to OS
Signed-off-by: Bora Guvendik <bora.guvendik@intel.com>
Change-Id: Ib24b494b0eedad447f3b2a3d1d80c9941680c25d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Diffstat (limited to 'src/soc/intel/alderlake/bootblock')
| -rw-r--r-- | src/soc/intel/alderlake/bootblock/report_platform.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index a064714dd7..4e071e7cdf 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -107,6 +107,7 @@ static struct { { PCI_DEVICE_ID_INTEL_ADL_P_GT2_5, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_6, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, + { PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) |