diff options
| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2020-12-02 17:14:32 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-12-09 14:23:15 +0000 |
| commit | 876b422641b7babda13c89443b694b199d73c80f (patch) | |
| tree | 7236152287a9c1d91d0c280116ac1f3563ae628d /src/soc/intel/alderlake/bootblock | |
| parent | 640f0ce93ffe50bac5816f085fa953f67cab0878 (diff) | |
soc/intel/common/dmi: Move DMI defines into DMI driver header
Move definitions of DMI control register and Secure Register
Lock (SRL) bit into common/block/dmi driver header file.
BUG=b:171534504
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: Iefee818f58f399d4a127662a300b6e132494bad0
Reviewed-on: https://review.coreboot.org/c/coreboot/+/48257
Reviewed-by: Furquan Shaikh <furquan@google.com>
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/bootblock')
| -rw-r--r-- | src/soc/intel/alderlake/bootblock/pch.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/src/soc/intel/alderlake/bootblock/pch.c b/src/soc/intel/alderlake/bootblock/pch.c index bc921e3a4a..528e4de46e 100644 --- a/src/soc/intel/alderlake/bootblock/pch.c +++ b/src/soc/intel/alderlake/bootblock/pch.c @@ -9,6 +9,7 @@ #include <device/mmio.h> #include <device/device.h> #include <device/pci_ops.h> +#include <intelblocks/dmi.h> #include <intelblocks/fast_spi.h> #include <intelblocks/gspi.h> #include <intelblocks/lpc_lib.h> @@ -34,9 +35,6 @@ #define PCR_PSFX_TO_SHDW_PCIEN_IOEN 0x01 #define PCR_PSFX_T0_SHDW_PCIEN 0x1C -#define PCR_DMI_DMICTL 0x2234 -#define PCR_DMI_DMICTL_SRLOCK (1 << 31) - #define PCR_DMI_ACPIBA 0x27B4 #define PCR_DMI_ACPIBDID 0x27B8 #define PCR_DMI_PMBASEA 0x27AC |