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authorTim Crawford <tcrawford@system76.com>2023-07-07 09:59:56 -0600
committerFelix Held <felix-coreboot@felixheld.de>2023-07-14 14:31:24 +0000
commit53c6eea2d42fb4b5f3a6d31bc4bdf538767e815b (patch)
tree34dbd201e87b760a89514e02e63d50bcc1c5bf08 /src/soc/intel/alderlake/bootblock
parent0bde1829e767f4cc9c0789514d1e243c53f94075 (diff)
soc/intel/adl: Add Raptor Lake-HX definitions
Tested by booting System76 Adder WS 3 (addw3) and Serval WS 13 (serw13) to edk2 payload and then OS. Ref: Intel Raptor Lake EDS, Volume 1 (#640555, rev. 2.8) Change-Id: I6098e9121a3afc4160c8a0c96d597e88095fd65d Signed-off-by: Tim Crawford <tcrawford@system76.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72926 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel/alderlake/bootblock')
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index d360197555..01be2aad50 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -75,6 +75,14 @@ static struct {
{ PCI_DID_INTEL_ADL_S_ID_12, "Alderlake-S (2+0)" },
{ PCI_DID_INTEL_ADL_S_ID_13, "Alderlake-S" },
{ PCI_DID_INTEL_ADL_S_ID_14, "Alderlake-S" },
+ { PCI_DID_INTEL_RPL_HX_ID_1, "Raptorlake-HX (8+16)" },
+ { PCI_DID_INTEL_RPL_HX_ID_2, "Raptorlake-HX (8+12)" },
+ { PCI_DID_INTEL_RPL_HX_ID_3, "Raptorlake-HX (8+8)" },
+ { PCI_DID_INTEL_RPL_HX_ID_4, "Raptorlake-HX (6+8)" },
+ { PCI_DID_INTEL_RPL_HX_ID_5, "Raptorlake-HX (6+4)" },
+ { PCI_DID_INTEL_RPL_HX_ID_6, "Raptorlake-HX (8+8)" },
+ { PCI_DID_INTEL_RPL_HX_ID_7, "Raptorlake-HX (6+8)" },
+ { PCI_DID_INTEL_RPL_HX_ID_8, "Raptorlake-HX (6+4)" },
{ PCI_DID_INTEL_RPL_P_ID_1, "Raptorlake-P" },
{ PCI_DID_INTEL_RPL_P_ID_2, "Raptorlake-P" },
{ PCI_DID_INTEL_RPL_P_ID_3, "Raptorlake-P" },
@@ -207,6 +215,10 @@ static struct {
{ PCI_DID_INTEL_ADL_S_GT2, "Alderlake S GT2" },
{ PCI_DID_INTEL_ADL_S_GT2_1, "Alderlake S GT2" },
{ PCI_DID_INTEL_ADL_S_GT2_2, "Alderlake S GT2" },
+ { PCI_DID_INTEL_RPL_HX_GT1, "Raptorlake HX GT1" },
+ { PCI_DID_INTEL_RPL_HX_GT2, "Raptorlake HX GT2" },
+ { PCI_DID_INTEL_RPL_HX_GT3, "Raptorlake HX GT3" },
+ { PCI_DID_INTEL_RPL_HX_GT4, "Raptorlake HX GT4" },
{ PCI_DID_INTEL_RPL_P_GT1, "Raptorlake P GT1" },
{ PCI_DID_INTEL_RPL_P_GT2, "Raptorlake P GT2" },
{ PCI_DID_INTEL_RPL_P_GT3, "Raptorlake P GT3" },