diff options
author | Michael Niewöhner <foss@mniewoehner.de> | 2023-04-07 17:04:29 +0000 |
---|---|---|
committer | Felix Singer <felixsinger@posteo.net> | 2023-04-12 15:19:49 +0000 |
commit | 7c722ce1795e58b3b5b3feb3053b850587e748d1 (patch) | |
tree | 0fa45c17c8cb58af6daf666733fc42129e131b07 /src/soc/intel/alderlake/acpi | |
parent | 76c27c8032dfb2a87e4ef326c8200ae138398d4b (diff) |
Revert "soc/intel/{tgl,adl}: Replace _S3 with D3COLD_SUPPORT symbol"
This reverts commit fd4ad29f1824ad5d8df67f3e30d3908d24cbd8a4.
Reason for revert: dependency for revert CB:73903
Change-Id: I5ed5e3e267032d62d65aef7fb246a075dccc9cf6
Signed-off-by: Michael Niewöhner <foss@mniewoehner.de>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73901
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <felixsinger@posteo.net>
Diffstat (limited to 'src/soc/intel/alderlake/acpi')
-rw-r--r-- | src/soc/intel/alderlake/acpi/tcss.asl | 4 | ||||
-rw-r--r-- | src/soc/intel/alderlake/acpi/tcss_dma.asl | 12 | ||||
-rw-r--r-- | src/soc/intel/alderlake/acpi/tcss_pcierp.asl | 12 | ||||
-rw-r--r-- | src/soc/intel/alderlake/acpi/tcss_xhci.asl | 8 |
4 files changed, 18 insertions, 18 deletions
diff --git a/src/soc/intel/alderlake/acpi/tcss.asl b/src/soc/intel/alderlake/acpi/tcss.asl index 5c95997f57..1f626fc7d3 100644 --- a/src/soc/intel/alderlake/acpi/tcss.asl +++ b/src/soc/intel/alderlake/acpi/tcss.asl @@ -583,7 +583,7 @@ Scope (\_SB.PCI0) } } -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Method (TCON, 0) { /* Reset IOM D3 cold bit if it is in D3 cold now. */ @@ -654,7 +654,7 @@ Scope (\_SB.PCI0) STAT = 0 } } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 /* * TCSS xHCI device diff --git a/src/soc/intel/alderlake/acpi/tcss_dma.asl b/src/soc/intel/alderlake/acpi/tcss_dma.asl index ca47bd0ec9..1483c0b5ac 100644 --- a/src/soc/intel/alderlake/acpi/tcss_dma.asl +++ b/src/soc/intel/alderlake/acpi/tcss_dma.asl @@ -28,16 +28,16 @@ Name (STAT, 0x1) /* Variable to save power state 1 - D0, 0 - D3C */ Method (_S0W, 0x0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Return (0x04) #else Return (0x03) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -49,12 +49,12 @@ Method (_PR0) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR3) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If (DUID == 0) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -66,7 +66,7 @@ Method (_PR3) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } /* diff --git a/src/soc/intel/alderlake/acpi/tcss_pcierp.asl b/src/soc/intel/alderlake/acpi/tcss_pcierp.asl index 6dbde46f49..4f1eec5d2c 100644 --- a/src/soc/intel/alderlake/acpi/tcss_pcierp.asl +++ b/src/soc/intel/alderlake/acpi/tcss_pcierp.asl @@ -247,16 +247,16 @@ Method (_PS3, 0, Serialized) Method (_S0W, 0x0, NotSerialized) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Return (0x4) #else Return (0x3) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR0) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -268,12 +268,12 @@ Method (_PR0) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } Method (_PR3) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) If ((TUID == 0) || (TUID == 1)) { Return (Package() { \_SB.PCI0.D3C, \_SB.PCI0.TBT0 }) } Else { @@ -285,7 +285,7 @@ Method (_PR3) } Else { Return (Package() { \_SB.PCI0.TBT1 }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } /* diff --git a/src/soc/intel/alderlake/acpi/tcss_xhci.asl b/src/soc/intel/alderlake/acpi/tcss_xhci.asl index ddc5a6665d..c0dc141530 100644 --- a/src/soc/intel/alderlake/acpi/tcss_xhci.asl +++ b/src/soc/intel/alderlake/acpi/tcss_xhci.asl @@ -30,11 +30,11 @@ Method (_PS3, 0, Serialized) Method (_S0W, 0x0, NotSerialized) { -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Return (0x4) #else Return (0x3) -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 } /* @@ -43,7 +43,7 @@ Method (_S0W, 0x0, NotSerialized) */ Name (SD3C, 0) -#if CONFIG(D3COLD_SUPPORT) +#if !CONFIG(SOC_INTEL_ALDERLAKE_S3) Method (_PR0) { Return (Package () { \_SB.PCI0.D3C }) @@ -53,7 +53,7 @@ Method (_PR3) { Return (Package () { \_SB.PCI0.D3C }) } -#endif // D3COLD_SUPPORT +#endif // SOC_INTEL_ALDERLAKE_S3 /* * XHCI controller _DSM method |