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authorSubrata Banik <subrata.banik@intel.com>2021-06-09 04:14:50 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-06-16 03:49:51 +0000
commit50134eccbdf4878f03e64b8085832a86c5b928f0 (patch)
tree4cc7fb1ebc8c5c7b80dfa10dd8fd41c84eadc3f8 /src/soc/intel/alderlake/acpi.c
parent5b81b8890221d5929d742ffd2b25b55e0ade3185 (diff)
soc/intel/alderlake: Make use of is_devfn_enabled() function
1. Replace all pcidev_path_on_root() and is_dev_enabled() functions combination with is_devfn_enabled(). 2. Remove unused local variable of device structure type (struct device *). 3. Replace pcidev_path_on_root() and dev->enabled check with is_devfn_enabled() call. TEST=Able to build and boot without any regression seen on ADL. Change-Id: I92671992ec14fd2adca1635b0791ac8b456332e9 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55292 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/acpi.c')
-rw-r--r--src/soc/intel/alderlake/acpi.c11
1 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/intel/alderlake/acpi.c b/src/soc/intel/alderlake/acpi.c
index 04d2a296fe..23d2a262e6 100644
--- a/src/soc/intel/alderlake/acpi.c
+++ b/src/soc/intel/alderlake/acpi.c
@@ -172,11 +172,10 @@ uint32_t soc_read_sci_irq_select(void)
static unsigned long soc_fill_dmar(unsigned long current)
{
- const struct device *const igfx_dev = pcidev_path_on_root(SA_DEVFN_IGD);
const uint64_t gfxvtbar = MCHBAR64(GFXVTBAR) & VTBAR_MASK;
const bool gfxvten = MCHBAR32(GFXVTBAR) & VTBAR_ENABLED;
- if (is_dev_enabled(igfx_dev) && gfxvtbar && gfxvten) {
+ if (is_devfn_enabled(SA_DEVFN_IGD) && gfxvtbar && gfxvten) {
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
@@ -185,11 +184,10 @@ static unsigned long soc_fill_dmar(unsigned long current)
acpi_dmar_drhd_fixup(tmp, current);
}
- const struct device *const ipu_dev = pcidev_path_on_root(SA_DEVFN_IPU);
const uint64_t ipuvtbar = MCHBAR64(IPUVTBAR) & VTBAR_MASK;
const bool ipuvten = MCHBAR32(IPUVTBAR) & VTBAR_ENABLED;
- if (is_dev_enabled(ipu_dev) && ipuvtbar && ipuvten) {
+ if (is_devfn_enabled(SA_DEVFN_IPU) && ipuvtbar && ipuvten) {
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, ipuvtbar);
@@ -200,8 +198,7 @@ static unsigned long soc_fill_dmar(unsigned long current)
/* TCSS Thunderbolt root ports */
for (unsigned int i = 0; i < MAX_TBT_PCIE_PORT; i++) {
- const struct device *const tbt_dev = pcidev_path_on_root(SA_DEVFN_TBT(i));
- if (is_dev_enabled(tbt_dev)) {
+ if (is_devfn_enabled(SA_DEVFN_TBT(i))) {
const uint64_t tbtbar = MCHBAR64(TBTxBAR(i)) & VTBAR_MASK;
const bool tbten = MCHBAR32(TBTxBAR(i)) & VTBAR_ENABLED;
if (tbtbar && tbten) {
@@ -235,7 +232,7 @@ static unsigned long soc_fill_dmar(unsigned long current)
}
/* Add RMRR entry */
- if (is_dev_enabled(igfx_dev)) {
+ if (is_devfn_enabled(SA_DEVFN_IGD)) {
const unsigned long tmp = current;
current += acpi_create_dmar_rmrr(current, 0,
sa_get_gsm_base(), sa_get_tolud_base() - 1);