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authorSubrata Banik <subratabanik@google.com>2022-12-19 23:14:35 +0530
committerFelix Held <felix-coreboot@felixheld.de>2022-12-23 13:00:30 +0000
commite9ac9f97e84ea4ceec3f2468f3ca2b5f2c47fbf2 (patch)
tree64d8ebee4fb17259bb61c7f2411a3e03aba85c49 /src/soc/intel/alderlake/Makefile.inc
parentaf20628a48d8a741a744dc0ecbfbc49524713eaf (diff)
soc/intel: Drop SoC specific DPTF implementation
This patch drops the SoC specific implementation as DPTF driver can now fillin those platform specific data using SoC specific macros. Signed-off-by: Subrata Banik <subratabanik@google.com> Change-Id: If65976f15374ba2410b537b1646ce466ba02969b Reviewed-on: https://review.coreboot.org/c/coreboot/+/71112 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Diffstat (limited to 'src/soc/intel/alderlake/Makefile.inc')
-rw-r--r--src/soc/intel/alderlake/Makefile.inc1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc
index 7f808ffa6e..415c2b1a56 100644
--- a/src/soc/intel/alderlake/Makefile.inc
+++ b/src/soc/intel/alderlake/Makefile.inc
@@ -27,7 +27,6 @@ romstage-y += cpu.c
ramstage-y += acpi.c
ramstage-y += chip.c
ramstage-y += cpu.c
-ramstage-y += dptf.c
ramstage-y += elog.c
ramstage-y += espi.c
ramstage-y += finalize.c