diff options
| author | Michał Żygowski <michal.zygowski@3mdeb.com> | 2022-10-29 21:32:54 +0200 |
|---|---|---|
| committer | Michał Żygowski <michal.zygowski@3mdeb.com> | 2023-06-23 08:59:50 +0000 |
| commit | 95be012c11936676f6573880d5fd01826ae6f9fe (patch) | |
| tree | 6ca992dc8602b24a402d4c6c2d40f5d6ee152281 /src/soc/intel/alderlake/Makefile.inc | |
| parent | 558d8b79e6b898e0f63772993f578aa4dd42128b (diff) | |
soc/intel/alderlake/hsphy: Add possibility to cache HSPHY in flash
The patch adds a possibility to cache the PCIe 5.0 HSPHY firmware in
the SPI flash. New flashmap region is created for that purpose. The
goal of caching is to reduce the dependency on CSME and the HECI IP
LOAD command which may fail when the CSME is disabled, e.g. soft
disabled by HECI command or HAP disabled. This change allows to
keep PCIe 5.0 root ports functioning even if CSME/HECI is not
functional.
TEST=Boot Ubuntu 22.04 on MSI PRO Z690-A and notice PCIe 5.0 port
is functional after loading the HSPHY from cache.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Change-Id: I5a37f5b06706ff30d92f60f1bf5dc900edbde96f
Reviewed-on: https://review.coreboot.org/c/coreboot/+/68987
Reviewed-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/Makefile.inc')
| -rw-r--r-- | src/soc/intel/alderlake/Makefile.inc | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Makefile.inc b/src/soc/intel/alderlake/Makefile.inc index dbee074e1e..886d532e60 100644 --- a/src/soc/intel/alderlake/Makefile.inc +++ b/src/soc/intel/alderlake/Makefile.inc @@ -114,4 +114,28 @@ $(eval $(call cse_add_input,bp2,IUNP)) endif +ifeq ($(CONFIG_INCLUDE_HSPHY_IN_FMAP),y) +ifneq ($(call strip_quotes,$(CONFIG_HSPHY_FW_FILE)),) + +# Create the target HSPHY file that will be put into flashmap region. +# First goes the HSPHY size, then hash algorithm (3 - SHA384, default for now), +# the hash digest, padding to max digest size (SHA512 - 64 bytes) and at last the +# HSPHY firmware itself +$(obj)/hsphy_fw.bin: $(call strip_quotes,$(top)/$(CONFIG_HSPHY_FW_FILE)) + printf " HSPHY $(obj)/hsphy_fw.bin\n" + $(shell wc -c $< | awk '{print $$1}' | tr -d '\n' | xargs -0 printf '%08X' | \ + tac -rs .. | xxd -r -p > $@) + $(shell printf '%02X' 3 | xxd -r -p >> $@) + $(shell sha384sum $< | awk '{print $$1}' | tac -rs .. | xxd -r -p >> $@) + $(shell dd if=/dev/zero bs=1 count=16 2> /dev/null >> $@) + $(shell cat $< >> $@) + +add_hsphy_firmware: $(obj)/hsphy_fw.bin $(obj)/fmap.fmap $(obj)/coreboot.pre $(CBFSTOOL) + $(CBFSTOOL) $(obj)/coreboot.pre write -u -r HSPHY_FW -f $(obj)/hsphy_fw.bin + +$(call add_intermediate, add_hsphy_firmware) + +endif +endif + endif |