diff options
| author | Furquan Shaikh <furquan@google.com> | 2020-12-31 22:50:14 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2021-01-25 19:14:19 +0000 |
| commit | a1c247b55dfc182b365ac0630fc615277017631e (patch) | |
| tree | 9b5c198f570b726e9bbe70cce9a14ddb910f2f42 /src/soc/intel/alderlake/Kconfig | |
| parent | 13d6a4647d3c46db88a295bfa6cf45608ada8a9d (diff) | |
soc/intel/adl and mb/intel/adlrvp: Use the newly added meminit block driver
This change uses the newly added meminit block driver and updates ADL
SoC and mainboard code accordingly.
BUG=b:172978729
Change-Id: Ibcc4ee685cdd70eac99f12a5b5d79fdbaf2b3cf6
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/49043
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Meera Ravindranath <meera.ravindranath@intel.com>
Reviewed-by: EricR Lai <ericr_lai@compal.corp-partner.google.com>
Reviewed-by: Subrata Banik <subrata.banik@intel.com>
Diffstat (limited to 'src/soc/intel/alderlake/Kconfig')
| -rw-r--r-- | src/soc/intel/alderlake/Kconfig | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index e7d37fb953..dd64592624 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -55,6 +55,7 @@ config CPU_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT select SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 select SOC_INTEL_COMMON_BLOCK_HDA + select SOC_INTEL_COMMON_BLOCK_MEMINIT select SOC_INTEL_COMMON_BLOCK_SA select SOC_INTEL_COMMON_BLOCK_SMM select SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP @@ -250,4 +251,17 @@ config SOC_INTEL_ALDERLAKE_DEBUG_CONSENT 0:Disabled, 1:Enabled (DCI OOB+[DbC]), 2:Enabled (DCI OOB), 3:Enabled (USB3 DbC), 4:Enabled (XDP/MIPI60), 5:Enabled (USB2 DbC), 6:Enable (2-wire DCI OOB), 7:Manual + +config DATA_BUS_WIDTH + int + default 128 + +config DIMMS_PER_CHANNEL + int + default 2 + +config MRC_CHANNEL_WIDTH + int + default 16 + endif |