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authorMichael Niewöhner <foss@mniewoehner.de>2021-01-17 02:51:00 +0100
committerPatrick Georgi <pgeorgi@google.com>2021-01-25 09:00:12 +0000
commitf7e91d22d46457e2d9f8e9015232d5c7f5119422 (patch)
tree5be06a7c9953a740c6641ab9e06a5c65372917ff /src/soc/intel/Kconfig
parent2efd6441c4d21cdd6d41679990fc9c34d74865ae (diff)
soc/intel/lpc_lib: mirror LPC registers to DMI when required
Starting with SPT, LPC registers IOD, IOE, LGIR* and LGMR need to be mirrored to their corresponding DMI registers. Add the required writes to DMI registers, where the PCI config registers get written. This is already done in soc code for IOD, IOE and LGIR* by mirroring the registers later, during PCH init. Also the code mostly matches accross the platforms. This common implementation will avoid delayed mirroring of the registers and also deduplicate the code. This change also adds a new Kconfig that will be selected by platforms requiring mirroring of LPC IO/MMIO registers to their corresponding DMI registers. For making use of this common code, the redundant soc code needs to be dropped and the newly introduced Kconfig option has to be selected. This is done in the follow-up change. Change-Id: I39f3bf4c486a1bbc112b2b453381de6da4bbac4d Signed-off-by: Michael Niewöhner <foss@mniewoehner.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49592 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/Kconfig')
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