soc/intel/icelake: Fix IO decode setup

Make pch_early_iorange_init() function similar to
soc/intel/cannonlake/bootblock/pch.c while fixing below issue:

* COM1 not being enabled properly.

TEST=Able to get serial output from an 8250IO UART device at
the standard 0x3f8 base address.

Change-Id: I5ab02f46d27e667be3d9328d94b634ef04038d2f
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/29835
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aamir Bohra <aamir.bohra@intel.com>

0 files changed, 0 insertions, 0 deletions