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authorAndrey Petrov <andrey.petrov@intel.com>2017-06-05 13:25:29 -0700
committerMartin Roth <martinroth@google.com>2017-07-02 18:50:38 +0000
commit0405de978401760df45120600a3bc95c66ae3781 (patch)
treebd7bd436c9f55240f6933671d0cc81899972124c /src/soc/imgtec
parent99f50c7465cd6d75a1e5c6c4452136106092cf3c (diff)
intel/block/cse: Add Cannon Lake SoC PCI device ID
Change-Id: Ida822d704b04cc4d1dfffb58003fc308bcb502d0 Signed-off-by: Andrey Petrov <andrey.petrov@intel.com> Reviewed-on: https://review.coreboot.org/20064 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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