Remove imgtec/pistachio SoC

After removing urara no board still uses this SoC, and there are no
plans to add any in the future (I'm not sure if the chip really exists
tbh...).

Change-Id: Ic4628fdfacc9fb19b6210394d96431fdb5f8e8f1
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/36491
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 0 insertions, 44 deletions

diff --git a/src/soc/imgtec/pistachio/soc.c b/src/soc/imgtec/pistachio/soc.c
deleted file mode 100644
index 156d1dea47..0000000000
--- a/src/soc/imgtec/pistachio/soc.c
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright 2014 The Chromium OS Authors.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#include <console/console.h>
-#include <device/device.h>
-#include <symbols.h>
-
-static void soc_read_resources(struct device *dev)
-{
-	ram_resource(dev, 0, (uintptr_t)_dram / KiB,
-		     (CONFIG_DRAM_SIZE_MB * MiB) / KiB);
-}
-
-static void soc_init(struct device *dev)
-{
-	printk(BIOS_INFO, "CPU: Imgtec Pistachio\n");
-}
-
-static struct device_operations soc_ops = {
-	.read_resources = soc_read_resources,
-	.init		= soc_init,
-};
-
-static void enable_soc_dev(struct device *dev)
-{
-	dev->ops = &soc_ops;
-}
-
-struct chip_operations soc_imgtec_pistachio_ops = {
-	CHIP_NAME("SOC: Imgtec Pistachio")
-	.enable_dev = enable_soc_dev,
-};