soc/ibm/power9/*: add file structure for SOC

Boot device is stubbed to be able to build boards without errors.

Change-Id: Ie74b1e34f9aebe151d0fdb0e95c003510fd864c3
Signed-off-by: Igor Bagnucki <bagnucki02@gmail.com>
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67062
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>

1 files changed, 15 insertions, 0 deletions

diff --git a/src/soc/ibm/power9/cbmem.c b/src/soc/ibm/power9/cbmem.c
new file mode 100644
index 0000000000..9543c45848
--- /dev/null
+++ b/src/soc/ibm/power9/cbmem.c
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <cbmem.h>
+
+uintptr_t cbmem_top_chipset(void)
+{
+	/*
+	 * Smallest reported to be working (but not officially supported) DIMM is
+	 * 4GB. This means that we always have at least as much available. Last
+	 * 256MB are reserved for hostboot/coreboot (OCC and HOMER images).
+	 *
+	 * TODO: implement this properly after RAM is detected.
+	 */
+	return 4ull * GiB - 256 * MiB;
+}