diff options
author | Elyes Haouas <ehaouas@noos.fr> | 2023-08-21 20:39:25 +0200 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2023-08-21 23:45:43 +0000 |
commit | 757509113b6b944167cf1f13f9569236cd7e5b18 (patch) | |
tree | a704133034ae50f622c9381454513145ef86d02b /src/soc/example | |
parent | a1957314c2cb78a229ca87bd2523d24001a644a9 (diff) |
soc: Remove SOC_SPECIFIC_OPTIONS
Move specific options under the boolean and remove dummy
SOC_SPECIFIC_OPTIONS.
Change-Id: I6ae52ceb61489e5a050a60d1fbbf4250960407eb
Signed-off-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76487
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Diffstat (limited to 'src/soc/example')
-rw-r--r-- | src/soc/example/min86/Kconfig | 11 |
1 files changed, 4 insertions, 7 deletions
diff --git a/src/soc/example/min86/Kconfig b/src/soc/example/min86/Kconfig index d1767523dd..12a13e5d8e 100644 --- a/src/soc/example/min86/Kconfig +++ b/src/soc/example/min86/Kconfig @@ -1,5 +1,9 @@ config SOC_EXAMPLE_MIN86 bool + select ARCH_X86 + select NO_MONOTONIC_TIMER + select NO_ECAM_MMCONF_SUPPORT + select UNKNOWN_TSC_RATE help This example SoC code along with the example/min86 mainboard should serve as a minimal example how a buildable x86 SoC code @@ -12,13 +16,6 @@ config SOC_EXAMPLE_MIN86 if SOC_EXAMPLE_MIN86 -config SOC_SPECIFIC_OPTIONS - def_bool y - select ARCH_X86 - select NO_MONOTONIC_TIMER - select NO_ECAM_MMCONF_SUPPORT - select UNKNOWN_TSC_RATE - config DCACHE_BSP_STACK_SIZE # required by arch/x86/car.ld default 0x100 |