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author | Kapil Porwal <kapilporwal@google.com> | 2022-08-25 10:25:26 +0000 |
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committer | Subrata Banik <subratabanik@google.com> | 2022-08-25 11:55:57 +0000 |
commit | a35c0e81b6db65db82faf58386997111413cb687 (patch) | |
tree | c79a135314b3f0d904c7e8feb57c22fd3f8fe0e1 /src/soc/example | |
parent | 86808827625c3bd8848789ad46758d1b2040561c (diff) |
soc/intel/mtl: Hook up Lp5CccConfig FSP UPD
Hook up Lp5CccConfig FSP UPD for Intel MeteorLake.
BUG=b:243734885
TEST=Built and booted on Google Rex. Verified the UPD value in MRC log.
Signed-off-by: Kapil Porwal <kapilporwal@google.com>
Change-Id: I3d7ff8e08546f06cf7807ee825cfef84c14a6c5d
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67052
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Maulik Vaghela <maulikvaghela@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/example')
0 files changed, 0 insertions, 0 deletions