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| author | Krystian Hebel <krystian.hebel@3mdeb.com> | 2024-05-20 20:58:41 +0200 |
|---|---|---|
| committer | Martin L Roth <gaumless@gmail.com> | 2024-08-30 15:44:23 +0000 |
| commit | 77d1a0d77fae3ac95dcd138bbbd1609a5377450d (patch) | |
| tree | f9ad7ed0ee1be41371e8544dc52953eafbce5d5c /src/soc/example/min86/chip.c | |
| parent | f28c6dd6367cdd775e4d03e67f3313f355953a95 (diff) | |
mb/qemu-q35/smihandler.c: add support for SMIs on QEMU
qemu-system-x86_64 uses AMD64 SMM save state format, despite emulating
Intel chipset. In addition, even though it implements SMI_STS register,
QEMU never sets any bits in it. As there is little emulated hardware
that can be generating SMI, assume that all SMIs come from APM. This
source is used e.g. to disable ACPI (which wasn't working until now on
QEMU) and SMMSTORE.
Tested by invoking SMMSTORE commands from the payload with SMM logging.
Change-Id: I2fc7b74bdc13be8d76bc536283ab5a14fffec45f
Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82558
Reviewed-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/example/min86/chip.c')
0 files changed, 0 insertions, 0 deletions