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author | Lijian Zhao <lijian.zhao@intel.com> | 2017-07-25 18:42:29 -0700 |
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committer | Aaron Durbin <adurbin@chromium.org> | 2017-07-27 15:50:36 +0000 |
commit | 03e44f46b080022a0c8949b2cc7ba88d587e671e (patch) | |
tree | ecef36ca9581a1e75a4e289d54330ee95056e68f /src/soc/dmp | |
parent | 1a4add9e873fb312c21c57ac3208cd758f16033c (diff) |
soc/intel/cannonlake: Correct gpio definition
The following changes have been applied for GPIO:
1. Correct port id using by GPIO community 3 for CNL-LP.
2. Correct number of doubleword for each pad from 2 to 4.
Change-Id: I717d1ffba8e6722543f4cf8083fe6145fa85e184
Signed-off-by: Lijian Zhao <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/20775
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/soc/dmp')
0 files changed, 0 insertions, 0 deletions