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authorElyes HAOUAS <ehaouas@noos.fr>2020-04-29 09:43:32 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-03 12:20:48 +0000
commite585f5b5cc29b006c551c746fb0bfb5fc69ec358 (patch)
treec86260bbed5e4a4cf1f923fe381da3f8654aed5d /src/soc/cavium
parenta1c767a19b0f617b95306bea4f6cbbd1f9907a6e (diff)
soc/intel/icelake: Fix 16-bit read/write PCI_COMMAND register
Change-Id: Ibe9752a3f09e8944f7fbcf385b83faae95a7cd9b Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40841 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/cavium')
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