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| author | Subrata Banik <subratabanik@google.com> | 2024-11-19 17:34:56 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-11-20 03:55:00 +0000 |
| commit | d22078a3c3b090a0d0c900520dc10dd8f09cda5c (patch) | |
| tree | 6715075f57c6e2a7775e2b36dbd5e2cd102a7002 /src/soc/cavium | |
| parent | 1b86f5ca9a02a2f2d2d799def68698b15feaa676 (diff) | |
soc/intel/pantherlake: Enable CPU feature programming in coreboot
This patch enables coreboot to perform CPU feature programming for both
the Boot Strap Processor (BSP) and Application Processors (APs) on
Intel Panther Lake platforms.
This change eliminates the need for the following FSP modules:
- CpuMpPpi
- CpuFeature
By handling CPU feature programming within coreboot, we reduce reliance
on external FSP binaries and improve code maintainability.
BUG=b:376092389, b/364822529
TEST=Built and booted google/fatcat successfully. Verified CPU features
are correctly programmed.
Change-Id: I73321485327f6a02ec8338fcfa1faf1e71008ba6
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85193
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Ronak Kanabar <ronak.kanabar@intel.com>
Diffstat (limited to 'src/soc/cavium')
0 files changed, 0 insertions, 0 deletions