summaryrefslogtreecommitdiff
path: root/src/soc/cavium/cn81xx/spi.c
diff options
context:
space:
mode:
authorArthur Heymans <arthur@aheymans.xyz>2018-07-18 11:48:47 +0200
committerFelix Held <felix-coreboot@felixheld.de>2018-10-15 14:10:18 +0000
commit1541256f22bbb046a43ccebf73d994d4f4a53374 (patch)
treef3fbbf0a870b5462b51e9347c91550146f54db13 /src/soc/cavium/cn81xx/spi.c
parent6db1b2fc24e5634d139d34c93813c2f703583494 (diff)
mb/asus/p5qc: Add mainboard
SeaBIOS does not seem to like the Marvel IDE controller, so disabled SeaBIOS support for ATA. It works fine in Linux afterwards. Working: - SATA on southbridge port - SATA on marvel IDE controller ports (only in Linux) - USB - COM1 - PS2 Keyboard - DDR2 DIMMs - PCIe x16 PEG port - PCI port - NIC (needs a driver to set macaddress) - S3 resume Not working: - SeaBIOS with ATA support (long timeout marvel controller so disabled) - DDR3 fails because the proper clock signal does not get enabled. Even when fixing this it fails later or during memtest, so it should be considered unsupported for now Untested: - PCIe x1 ports (expected to work) - sound (expected to work) TODO: add documentation Change-Id: I4a81940707566776bd048904ca1387fea741fece Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/28264 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/cavium/cn81xx/spi.c')
0 files changed, 0 insertions, 0 deletions