diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-03-27 04:26:16 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-05-06 17:34:07 +0000 |
| commit | 9580e7fba87f3e933c2fc1a654ecfcde9c8376f1 (patch) | |
| tree | 8f01f8de9764cb1eb558e8c617f209e3a5158942 /src/soc/cavium/cn81xx/soc.c | |
| parent | 49e5d3dc262c91a4fbf9c05e97c19ded1098247f (diff) | |
soc/intel/xeon_sp: Add fill_pd_distances
Update a simple algorithm to cover some basic case for proximity
domain distance handling. In the same time, the local variable
usage of fill_pds() is optimized.
TEST=Build and boot on intel/archercity CRB
ACPI SRAT, SLIT and DMAR (Remapping Hardware Static Affinity) are
generated correctly for 2S system.
Change-Id: I2b666dc2a140d1bb1fdff9bc7b835d5cf5b4bbc5
Signed-off-by: Shuo Liu <shuo.liu@intel.com>
Co-authored-by: Ziang Wang <ziang.wang@intel.com>
Co-authored-by: Gang Chen <gang.c.chen@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81442
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/cavium/cn81xx/soc.c')
0 files changed, 0 insertions, 0 deletions