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author | Felix Held <felix-coreboot@felixheld.de> | 2021-05-31 20:07:02 +0200 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2021-06-01 20:37:26 +0000 |
commit | 5fd63bd016ae9b65dde36267c08e41473ba44942 (patch) | |
tree | 93da3343e0c697cd1bfc936904611cbc66f4493b /src/soc/cavium/cn81xx/soc.c | |
parent | 4fbab545b2a99407ff444a29730c443aee4f24db (diff) |
mainboards using soc/amd/picasso: use aliases for remaining PCIe devices
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Id2bdce5871f57e9edb17f89cba61b5c5ae018566
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55104
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/cavium/cn81xx/soc.c')
0 files changed, 0 insertions, 0 deletions