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authorRaul E Rangel <rrangel@chromium.org>2021-02-10 16:45:49 -0700
committerFelix Held <felix-coreboot@felixheld.de>2021-02-14 18:13:56 +0000
commit12c6a5885786d2b06d67f67afa7d4db2d6e815e9 (patch)
treeafec59b90319ee97285fbf971e6a61be839d5def /src/soc/cavium/cn81xx/gpio.c
parent35dc4b0ede0f4074351ac089d5abb1b5004cfa24 (diff)
soc/amd/cezanne: Fill FADT and MADT
The MADT doesn't populate the IO-APICs yet since we need FSP to configure those. The FADT differs from picasso in the following ways: * The duty_offset is supposed to be 0 * Don't clear x_firmware_ctl_l * Make the extended addresses use MMIO Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: Ib6c3a01084a0de33894885b47c637a292d252ed4 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50510 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/cavium/cn81xx/gpio.c')
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