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authorElyes Haouas <ehaouas@noos.fr>2022-12-03 12:14:40 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-12-06 19:44:06 +0000
commit285bf097abc57f8e6ab8f99fd4d3f69193b2003b (patch)
tree97789aed39d8056a38e786a66cf6a462d832d9b8 /src/soc/cavium/cn81xx/cpu.c
parentf68bd1273b40e575ada18e0497a9dad626fe4a5c (diff)
soc/cavium/cn81xx: Use read64p()
Change-Id: Ia79816ccc230d17dd1ce2bde7a185b4d502ad107 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70284 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Diffstat (limited to 'src/soc/cavium/cn81xx/cpu.c')
-rw-r--r--src/soc/cavium/cn81xx/cpu.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/cavium/cn81xx/cpu.c b/src/soc/cavium/cn81xx/cpu.c
index bb85029783..14aff58a2a 100644
--- a/src/soc/cavium/cn81xx/cpu.c
+++ b/src/soc/cavium/cn81xx/cpu.c
@@ -11,7 +11,7 @@
uint64_t cpu_get_available_core_mask(void)
{
- return read64((void *)RST_PP_AVAILABLE);
+ return read64p(RST_PP_AVAILABLE);
}
size_t cpu_get_num_available_cores(void)
@@ -75,7 +75,7 @@ size_t start_cpu(size_t cpu, void (*entry_64)(size_t core_id))
write64((void *)MIO_BOOT_AP_JUMP, (uintptr_t)secondary_init);
/* Get coremask of cores in reset */
- const uint64_t reset = read64((void *)RST_PP_RESET);
+ const uint64_t reset = read64p(RST_PP_RESET);
printk(BIOS_INFO, "CPU: Cores currently in reset: 0x%llx\n", reset);
/* Setup entry for secondary core */
@@ -93,7 +93,7 @@ size_t start_cpu(size_t cpu, void (*entry_64)(size_t core_id))
stopwatch_init_usecs_expire(&sw, 1000000);
do {
- pending = read64((void *)RST_PP_PENDING);
+ pending = read64p(RST_PP_PENDING);
} while (!stopwatch_expired(&sw) && (pending & coremask));
if (stopwatch_expired(&sw)) {