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authorAamir Bohra <aamir.bohra@intel.com>2017-05-25 13:49:53 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-05 00:30:31 +0200
commit1fa16c9cb6c486cdd4b1bcb3734308b28b9c9a22 (patch)
tree3d29cd870fbf8345020361e70f3f19bd9c6b53bd /src/soc/broadcom/cygnus/cbmem.c
parent22b2c793e3587fb98d42f88e5e623621e055ff3a (diff)
soc/intel/common: Add common Intel timer code
Add common timer code to get tsc frequency(Mhz). Change-Id: Ifd4b24735c74c636348fc32afbcc267e384cb610 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://review.coreboot.org/19911 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/soc/broadcom/cygnus/cbmem.c')
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